Effects of morphological changes of Pt/SrBi₂Ta₂O₉ interface on the electrical properties of ferroelectric capacitor

Morphological changes have been observed at the interface of Pt/SrBi₂Ta₂O₉ (SBT) before and after annealing at 600 and 800°C after depositing Pt top electrode. We have investigated leakage currents, breakdown voltages, and capacitances of pt/SBT/Pt /SiO₂/Si capacitor and Pt/SBT/CeO₂/Si gate structure. As a result, the leakage current density and capacitance are reduced from 10^-7 to 10^-8 A/cm² and 1.3 × 10^-10 to 8.5 × 10^-11 F/cm², respectively, and breakdown voltage increases from 5 to 14 V after post-annealing. The reduced leakage current density and increased breakdown voltage in the annealed samples are due to the smooth morphology of the interface of Pt/SBT. In the as-deposited Pt top electrode on SBT films, high electric field intensity is generated due to small arc of the valleys filled with fine Pt grains, resulting in higher leakage current density than the post-annealed Pt top electrode. Although the total gate capacitance of the post-annealed sample is reduced by the non-contact area due to voids at the interface of Pt/SBT, memory window of the ferroelectric gate is not influenced by such voids.