Abstract
Integrated circuits (ICs) are the fundamental microelectronic building blocks of typical information and communication technology (ICT) devices such as laptops and smartphone. With the emergence of faster and cheaper low-power ICs for the growing ICT market, there is a limited information on their manufacturing energy and economic impacts owing to the lack of recurrent upgradation of proprietary IC manufacturing process data. Economic and life cycle energy assessments (LCAs) of IC manufacturing and assembly processes were conducted using the latest bill of materials (BOM) manufacturing data in a state-of-the-art IC manufacturing cost software tool developed by IC Knowledge, LLC. IC manufacturing cost was estimated to be $1.00-$5.00/cm2; the high-end cost represents the most advanced 3D NAND IC technology with the Wafer Level Chip Scale Package cost of $4/cm2. Total cumulative energy demand (CED) estimates of IC manufacturing using the OpenLCA software ranged from 9 to 38 MJ/cm2 or 56–235 BJ/month with the largest share (~ 75%) from on-site energy. The IC manufacturing CED is projected to increase with the progress in IC technology node, which has increased by more than two times for technology node evolution from 110 to 14 nm. Furthermore, the representative detailed BOM data were considered to reduce the CED uncertainties of the estimated standard deviation of 35%− 42%.
Original language | English |
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Article number | 100771 |
Journal | Sustainable Computing: Informatics and Systems |
Volume | 35 |
DOIs | |
State | Published - Sep 2022 |
Funding
This manuscript has been authored by UT-Battelle, LLC, under contract DE-AC05–00OR22725 with the US Department of Energy (DOE). The US government retains and the publisher, by accepting the article for publication, acknowledges that the US government retains a nonexclusive, paid-up, irrevocable, worldwide license to publish or reproduce the published form of this manuscript, or allow others to do so, for US government purposes. DOE will provide public access to these results of federally sponsored research in accordance with the DOE Public Access Plan (http://energy.gov/downloads/doe-public-access-plan). This work was financially supported by the US Department of Energy Advanced Manufacturing Office , Washington, DC, USA under contract DE-AC05–00OR22725 with the US Department of Energy ( DOE ). The authors gratefully acknowledge the financial support provided by the Advanced Manufacturing Office, US Department of Energy for this work. The authors would like to thank Olivia Shafer for editing assistance.
Keywords
- Economic assessment
- Information and communication technology electronics
- Integrated circuits
- Life cycle assessment