Discriminator with a current-sum multiplicity output for the PHENIX multiplicity vertex detector

  • R. S. Smith
  • , E. J. Kennedy
  • , R. G. Jackson
  • , M. L. Simpson
  • , C. L. Britton
  • , W. L. Bryan
  • , U. Jagadish
  • , G. R. Young
  • , B. V. Jacak
  • , J. Kapustinsky
  • , A. Oscarson

Research output: Contribution to conferencePaperpeer-review

Abstract

A current output multiplicity discriminator for use in the front-end electronics (FEE) of the Multiplicity Vertex Detector (MVD) for the PHENIX detector at RHIC has been fabricated in the a 1.2-μ CMOS, n-well process. The discriminator is capable of triggering on input signals ranging from 0.25 MIP to 5 MIP. Frequency response of the discriminator is such that the circuit is capable of generating an output for every bunch crossing (105 ns) of the RHIC collider. Channel-to-channel threshold matching was adjustable to ±4 mV. One channel of multiplicity discriminator occupied an area of 85 μ×630 μ and consumed 515 μW from a single 5-V supply. Details of the design and results from prototype device testing are presented.

Original languageEnglish
Pages439-442
Number of pages4
StatePublished - 1996
Externally publishedYes
EventProceedings of the 1996 IEEE Nuclear Science Symposium. Part 1 (of 3) - Anaheim, CA, USA
Duration: Nov 2 1996Nov 9 1996

Conference

ConferenceProceedings of the 1996 IEEE Nuclear Science Symposium. Part 1 (of 3)
CityAnaheim, CA, USA
Period11/2/9611/9/96

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