Abstract
A current output multiplicity discriminator for use in the front-end electronics (FEE) of the Multiplicity Vertex Detector (MVD) for the PHENIX detector at RHIC has been fabricated in the a 1.2-μ CMOS, n-well process. The discriminator is capable of triggering on input signals ranging from 0.25 MIP to 5 MIP. Frequency response of the discriminator is such that the circuit is capable of generating an output for every bunch crossing (105 ns) of the RHIC collider. Channel-to-channel threshold matching was adjustable to ±4 mV. One channel of multiplicity discriminator occupied an area of 85 μ×630 μ and consumed 515 μW from a single 5-V supply. Details of the design and results from prototype device testing are presented.
Original language | English |
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Pages | 439-442 |
Number of pages | 4 |
State | Published - 1996 |
Externally published | Yes |
Event | Proceedings of the 1996 IEEE Nuclear Science Symposium. Part 1 (of 3) - Anaheim, CA, USA Duration: Nov 2 1996 → Nov 9 1996 |
Conference
Conference | Proceedings of the 1996 IEEE Nuclear Science Symposium. Part 1 (of 3) |
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City | Anaheim, CA, USA |
Period | 11/2/96 → 11/9/96 |