TY - GEN
T1 - Directive-based, high-level programming and optimizations for high-performance computing with FPGAs
AU - Lambert, Jacob
AU - Lee, Seyong
AU - Kim, Jungwon
AU - Vetter, Jeffrey S.
AU - Malony, Allen D.
N1 - Publisher Copyright:
© 2018 Association for Computing Machinery.
PY - 2018/6/12
Y1 - 2018/6/12
N2 - Reconfigurable architectures like Field Programmable Gate Arrays (FPGAs) have been used for accelerating computations from several domains because of their unique combination of flexibility, performance, and power efficiency. However, FPGAs have not been widely used for high-performance computing, primarily because of their programming complexity and difficulties in optimizing performance. In this paper, we present a directive-based, high-level optimization framework for high-performance computing with FPGAs, built on top of an OpenACC-to-FPGA translation framework called OpenARC. We propose directive extensions and corresponding compile-time optimization techniques to enable the compiler to generate more efficient FPGA hardware configuration files. Empirical evaluation of the proposed framework on an Intel Stratix V with five OpenACC benchmarks from various application domains shows that FPGA-specific optimizations can lead to significant increases in performance across all tested applications. We also demonstrate that applying these high-level directive-based optimizations can allow OpenACC applications to perform similarly to lower-level OpenCL applications with hand-written FPGA-specific optimizations, and offer runtime and power performance benefits compared to CPUs and GPUs.
AB - Reconfigurable architectures like Field Programmable Gate Arrays (FPGAs) have been used for accelerating computations from several domains because of their unique combination of flexibility, performance, and power efficiency. However, FPGAs have not been widely used for high-performance computing, primarily because of their programming complexity and difficulties in optimizing performance. In this paper, we present a directive-based, high-level optimization framework for high-performance computing with FPGAs, built on top of an OpenACC-to-FPGA translation framework called OpenARC. We propose directive extensions and corresponding compile-time optimization techniques to enable the compiler to generate more efficient FPGA hardware configuration files. Empirical evaluation of the proposed framework on an Intel Stratix V with five OpenACC benchmarks from various application domains shows that FPGA-specific optimizations can lead to significant increases in performance across all tested applications. We also demonstrate that applying these high-level directive-based optimizations can allow OpenACC applications to perform similarly to lower-level OpenCL applications with hand-written FPGA-specific optimizations, and offer runtime and power performance benefits compared to CPUs and GPUs.
KW - Directive-based programming
KW - FPGA
KW - OpenACC
KW - OpenARC
KW - OpenCL
KW - Reconfigurable computing
KW - Sliding window
UR - http://www.scopus.com/inward/record.url?scp=85055856272&partnerID=8YFLogxK
U2 - 10.1145/3205289.3205324
DO - 10.1145/3205289.3205324
M3 - Conference contribution
AN - SCOPUS:85055856272
T3 - Proceedings of the International Conference on Supercomputing
SP - 160
EP - 171
BT - ICS 2018
PB - Association for Computing Machinery
T2 - 32nd International Conference on Supercomputing, ICS 2018
Y2 - 12 June 2018 through 15 June 2018
ER -