Development of a low-inductance SiC trench MOSFET power module for high-frequency application

Zhiqiang Jack Wang; Fei Yang; Steven Campbell; Madhu Chinthavali

doi:10.1109/APEC.2018.8341419

Development of a low-inductance SiC trench MOSFET power module for high-frequency application

Zhiqiang Jack Wang, Fei Yang, Steven Campbell, Madhu Chinthavali

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

18 Scopus citations

Abstract

This paper deals with the development of a low-inductance multiple-chip power module with state-of-art 1200 V SiC Trench MOSFETs for high-frequency application. Specifically, a phase-leg power module package with integrated decoupling capacitance is fabricated based on P-cell/N-cell concept, and the packaging design is discussed in detail. Dedicated double pulse test is built, and a gate driver with cross-talk suppression function is designed to support the fast switching speed operation of SiC Trench MOSFETs. The parasitic inductance and current density distribution of the power module are simulated and extracted for the purpose of voltage spike limiting. The temperature dependent static and switching characteristics of the developed module are evaluated as well, and the key differences from traditional SiC double-diffused MOS (DMOS) are identified and discussed. Based on the turn-off switching characterization results, a lumped equivalent power-loop parasitic inductance of ∼ 6 nH is achieved for the designed power module.

Original language	English
Title of host publication	APEC 2018 - 33rd Annual IEEE Applied Power Electronics Conference and Exposition
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	2834-2841
Number of pages	8
ISBN (Electronic)	9781538611807
DOIs	https://doi.org/10.1109/APEC.2018.8341419
State	Published - Apr 18 2018
Event	33rd Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2018 - San Antonio, United States Duration: Mar 4 2018 → Mar 8 2018

Publication series

Name	Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC
Volume	2018-March

Conference

Conference	33rd Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2018
Country/Territory	United States
City	San Antonio
Period	03/4/18 → 03/8/18

Funding

This manuscript has been authored by UT-Battelle, LLC under Contract No. DE-AC05-00OR22725 with the U.S. Department of Energy. The United States Government retains and the publisher, by accepting the article for publication, acknowledges that the United States Government retains a nonexclusive, paid-up, irrevocable, world-wide license to publish or reproduce the published form of this manuscript, or allow others to do so, for United States Government purposes. The Department of Energy will provide public access to these results of federally sponsored research in accordance with the DOE Public Access Plan (http://energy.gov/downloads/doe-public-access-plan).

Funders	Funder number
LLC
UT-Battelle

Keywords

Low parasitic inductance
Multiple-chip power module
SiC Trench MOSFET

Access to Document

10.1109/APEC.2018.8341419

Cite this

Wang, Z. J., Yang, F., Campbell, S., & Chinthavali, M. (2018). Development of a low-inductance SiC trench MOSFET power module for high-frequency application. In APEC 2018 - 33rd Annual IEEE Applied Power Electronics Conference and Exposition (pp. 2834-2841). (Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC; Vol. 2018-March). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/APEC.2018.8341419

Wang, Zhiqiang Jack ; Yang, Fei ; Campbell, Steven et al. / Development of a low-inductance SiC trench MOSFET power module for high-frequency application. APEC 2018 - 33rd Annual IEEE Applied Power Electronics Conference and Exposition. Institute of Electrical and Electronics Engineers Inc., 2018. pp. 2834-2841 (Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC).

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title = "Development of a low-inductance SiC trench MOSFET power module for high-frequency application",

abstract = "This paper deals with the development of a low-inductance multiple-chip power module with state-of-art 1200 V SiC Trench MOSFETs for high-frequency application. Specifically, a phase-leg power module package with integrated decoupling capacitance is fabricated based on P-cell/N-cell concept, and the packaging design is discussed in detail. Dedicated double pulse test is built, and a gate driver with cross-talk suppression function is designed to support the fast switching speed operation of SiC Trench MOSFETs. The parasitic inductance and current density distribution of the power module are simulated and extracted for the purpose of voltage spike limiting. The temperature dependent static and switching characteristics of the developed module are evaluated as well, and the key differences from traditional SiC double-diffused MOS (DMOS) are identified and discussed. Based on the turn-off switching characterization results, a lumped equivalent power-loop parasitic inductance of ∼ 6 nH is achieved for the designed power module.",

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Wang, ZJ, Yang, F, Campbell, S & Chinthavali, M 2018, Development of a low-inductance SiC trench MOSFET power module for high-frequency application. in APEC 2018 - 33rd Annual IEEE Applied Power Electronics Conference and Exposition. Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC, vol. 2018-March, Institute of Electrical and Electronics Engineers Inc., pp. 2834-2841, 33rd Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2018, San Antonio, United States, 03/4/18. https://doi.org/10.1109/APEC.2018.8341419

Development of a low-inductance SiC trench MOSFET power module for high-frequency application. / Wang, Zhiqiang Jack; Yang, Fei; Campbell, Steven et al.
APEC 2018 - 33rd Annual IEEE Applied Power Electronics Conference and Exposition. Institute of Electrical and Electronics Engineers Inc., 2018. p. 2834-2841 (Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC; Vol. 2018-March).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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N2 - This paper deals with the development of a low-inductance multiple-chip power module with state-of-art 1200 V SiC Trench MOSFETs for high-frequency application. Specifically, a phase-leg power module package with integrated decoupling capacitance is fabricated based on P-cell/N-cell concept, and the packaging design is discussed in detail. Dedicated double pulse test is built, and a gate driver with cross-talk suppression function is designed to support the fast switching speed operation of SiC Trench MOSFETs. The parasitic inductance and current density distribution of the power module are simulated and extracted for the purpose of voltage spike limiting. The temperature dependent static and switching characteristics of the developed module are evaluated as well, and the key differences from traditional SiC double-diffused MOS (DMOS) are identified and discussed. Based on the turn-off switching characterization results, a lumped equivalent power-loop parasitic inductance of ∼ 6 nH is achieved for the designed power module.

AB - This paper deals with the development of a low-inductance multiple-chip power module with state-of-art 1200 V SiC Trench MOSFETs for high-frequency application. Specifically, a phase-leg power module package with integrated decoupling capacitance is fabricated based on P-cell/N-cell concept, and the packaging design is discussed in detail. Dedicated double pulse test is built, and a gate driver with cross-talk suppression function is designed to support the fast switching speed operation of SiC Trench MOSFETs. The parasitic inductance and current density distribution of the power module are simulated and extracted for the purpose of voltage spike limiting. The temperature dependent static and switching characteristics of the developed module are evaluated as well, and the key differences from traditional SiC double-diffused MOS (DMOS) are identified and discussed. Based on the turn-off switching characterization results, a lumped equivalent power-loop parasitic inductance of ∼ 6 nH is achieved for the designed power module.

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Wang ZJ, Yang F, Campbell S , Chinthavali M. Development of a low-inductance SiC trench MOSFET power module for high-frequency application. In APEC 2018 - 33rd Annual IEEE Applied Power Electronics Conference and Exposition. Institute of Electrical and Electronics Engineers Inc. 2018. p. 2834-2841. (Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC). doi: 10.1109/APEC.2018.8341419

Development of a low-inductance SiC trench MOSFET power module for high-frequency application

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