Designing Algorithms for the EMU Migrating-threads-based Architecture

Mehmet E. Belviranli; Seyong Lee; Jeffrey S. Vetter

doi:10.1109/HPEC.2018.8547571

Designing Algorithms for the EMU Migrating-threads-based Architecture

Mehmet E. Belviranli, Seyong Lee, Jeffrey S. Vetter

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

8 Scopus citations

Abstract

The decades-old memory bottleneck problem for data-intensive applications is getting worse as the processor core counts continue to increase. Workloads with sparse memory access characteristics only achieve a fraction of a system's total memory bandwidth. EMU architecture provides a radical approach to the issue by migrating the computational threads to the location where the data resides. The system enables access to a large PGAS-type memory for hundreds of nodes via a Cilk-based multi-threaded execution scheme. EMU architecture brings brand new challenges in application design and development. Data distribution and thread creation strategies play a crucial role in achieving optimal performance in the EMU platform. In this work, we identify several design considerations that need to be taken care of while developing applications for the new architecture and we evaluate their performance effects on the EMU-chick hardware. We also present a modified BFS algorithm for the EMU system and give experimental results for its execution on the platform.

Original language	English
Title of host publication	2018 IEEE High Performance Extreme Computing Conference, HPEC 2018
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781538659892
DOIs	https://doi.org/10.1109/HPEC.2018.8547571
State	Published - Nov 26 2018
Event	2018 IEEE High Performance Extreme Computing Conference, HPEC 2018 - Waltham, United States Duration: Sep 25 2018 → Sep 27 2018

Publication series

Name	2018 IEEE High Performance Extreme Computing Conference, HPEC 2018

Conference

Conference	2018 IEEE High Performance Extreme Computing Conference, HPEC 2018
Country/Territory	United States
City	Waltham
Period	09/25/18 → 09/27/18

Funding

This material is based upon work supported by the U.S. Department of Energy, Office of Science, Office of Advanced Scientific Computing Research, under contract number DE-AC05-00OR22725. This manuscript has been authored by UT-Battelle, LLC, under contract DE-AC05-00OR22725 with the US Department of Energy (DOE). The US government retains and the publisher, by accepting the article for publication, acknowledges that the US government retains a nonexclusive, paid-up, irrevocable, worldwide license to publish or reproduce the published form of this manuscript, or allow others to do so, for US government purposes. DOE will provide public access to these results of federally sponsored research in accordance with the DOE Public Access Plan (http://energy.gov/downloads/doe-public-access-plan).

Funders	Funder number
US Department of Energy
U.S. Department of Energy
Office of Science
Advanced Scientific Computing Research	DE-AC05-00OR22725

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10.1109/HPEC.2018.8547571

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Belviranli, M. E., Lee, S., & Vetter, J. S. (2018). Designing Algorithms for the EMU Migrating-threads-based Architecture. In 2018 IEEE High Performance Extreme Computing Conference, HPEC 2018 Article 8547571 (2018 IEEE High Performance Extreme Computing Conference, HPEC 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/HPEC.2018.8547571

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abstract = "The decades-old memory bottleneck problem for data-intensive applications is getting worse as the processor core counts continue to increase. Workloads with sparse memory access characteristics only achieve a fraction of a system's total memory bandwidth. EMU architecture provides a radical approach to the issue by migrating the computational threads to the location where the data resides. The system enables access to a large PGAS-type memory for hundreds of nodes via a Cilk-based multi-threaded execution scheme. EMU architecture brings brand new challenges in application design and development. Data distribution and thread creation strategies play a crucial role in achieving optimal performance in the EMU platform. In this work, we identify several design considerations that need to be taken care of while developing applications for the new architecture and we evaluate their performance effects on the EMU-chick hardware. We also present a modified BFS algorithm for the EMU system and give experimental results for its execution on the platform.",

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Belviranli, ME, Lee, S & Vetter, JS 2018, Designing Algorithms for the EMU Migrating-threads-based Architecture. in 2018 IEEE High Performance Extreme Computing Conference, HPEC 2018., 8547571, 2018 IEEE High Performance Extreme Computing Conference, HPEC 2018, Institute of Electrical and Electronics Engineers Inc., 2018 IEEE High Performance Extreme Computing Conference, HPEC 2018, Waltham, United States, 09/25/18. https://doi.org/10.1109/HPEC.2018.8547571

Designing Algorithms for the EMU Migrating-threads-based Architecture. / Belviranli, Mehmet E.; Lee, Seyong ; Vetter, Jeffrey S.
2018 IEEE High Performance Extreme Computing Conference, HPEC 2018. Institute of Electrical and Electronics Engineers Inc., 2018. 8547571 (2018 IEEE High Performance Extreme Computing Conference, HPEC 2018).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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Designing Algorithms for the EMU Migrating-threads-based Architecture

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