Designing a hamming coder/decoder using QCAs

Mirmansour Ziabari, Ahmad Mohades Kassai, Amirkoushyar Ziabari, Shahin Enayati Maklavani

Research output: Contribution to journalArticlepeer-review

9 Scopus citations

Abstract

In this research, the arithmetic structures of Hamming coder/decoder are discussed and a general formula for the case of a single bit error in composite dataword parity bits is derived and using this formula a design work for logic circuitry which functions as Hamming coder/decoder and exclusively is composed of XOR-gates is presented. The advantages of unique capabilities of Quantum dot Cellular Automata (QCA) are stated. Then many design consideration are described and showed that how NAND/NOR operations routing mechanism can be implemented using QCAs. Substituting these blocks with XORs leads to a design work which is completely composed of NAND gates and in turn of QCAs. For the reason of complexity of the final design work, the advantage of an advanced software tool i.e., the QCADesigner for final implementation of the QCA network is taken. To minimize total delay and chip area and in turn total manufacturing cost the design work is so modified that the number of clocking zone between input and output to be minimum and this can be the reason of superiority of the proposed design work.

Original languageEnglish
Pages (from-to)2569-2576
Number of pages8
JournalJournal of Applied Sciences
Volume8
Issue number14
DOIs
StatePublished - 2008
Externally publishedYes

Keywords

  • Clocking zone
  • QCA chip
  • QCA routing element
  • Single bit error

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