Design, modeling, testing, and spice parameter extraction of DIMOS transistor in 4H-silicon carbide

M. D. Hasanuzzaman; Syed K. Islam; Leon M. Tolbert; Burak Ozpineci

doi:10.1142/S0129156406003989

Design, modeling, testing, and spice parameter extraction of DIMOS transistor in 4H-silicon carbide

M. D. Hasanuzzaman, Syed K. Islam, Leon M. Tolbert, Burak Ozpineci

Buildings and Transportation Science Div

Research output: Contribution to journal › Article › peer-review

9 Scopus citations

Abstract

In this paper, an analytical model for a vertical double implanted metal-oxide semiconductor (DIMOS) transistor structure in 4H-Silicon Carbide (SiC) is presented. Simulation for transport characteristics of the SiC MOSFET with the exact device geometry is carried out using the commercial device simulator MEDICI. A rigorous experimental testing and characterization is done on a 4H-SiC DIMOS transistor test device. SPICE parameters are extracted from the measurements, and a SPICE model for the DIMOS transistor has been developed. The presented work is a part of team efforts of material, device, and power electronics researchers at the University of Tennessee and Oak Ridge National Laboratory.

Original language	English
Pages (from-to)	733-746
Number of pages	14
Journal	International Journal of High Speed Electronics and Systems
Volume	16
Issue number	2
DOIs	https://doi.org/10.1142/S0129156406003989
State	Published - Jun 2006

Funding

This project is supported by ORNL and the U.S. Department of Energy's Office of Advanced Transportation Technology Freedom Car Research Program.

Funders	Funder number
U.S. Department of Energy
Oak Ridge National Laboratory

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abstract = "In this paper, an analytical model for a vertical double implanted metal-oxide semiconductor (DIMOS) transistor structure in 4H-Silicon Carbide (SiC) is presented. Simulation for transport characteristics of the SiC MOSFET with the exact device geometry is carried out using the commercial device simulator MEDICI. A rigorous experimental testing and characterization is done on a 4H-SiC DIMOS transistor test device. SPICE parameters are extracted from the measurements, and a SPICE model for the DIMOS transistor has been developed. The presented work is a part of team efforts of material, device, and power electronics researchers at the University of Tennessee and Oak Ridge National Laboratory.",

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AU - Islam, Syed K.

AU - Tolbert, Leon M.

AU - Ozpineci, Burak

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AB - In this paper, an analytical model for a vertical double implanted metal-oxide semiconductor (DIMOS) transistor structure in 4H-Silicon Carbide (SiC) is presented. Simulation for transport characteristics of the SiC MOSFET with the exact device geometry is carried out using the commercial device simulator MEDICI. A rigorous experimental testing and characterization is done on a 4H-SiC DIMOS transistor test device. SPICE parameters are extracted from the measurements, and a SPICE model for the DIMOS transistor has been developed. The presented work is a part of team efforts of material, device, and power electronics researchers at the University of Tennessee and Oak Ridge National Laboratory.

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Design, modeling, testing, and spice parameter extraction of DIMOS transistor in 4H-silicon carbide

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