Design and Characterization of the BVX: An 8-Channel CMOS Preamplifier-Shaper for Silicon Strips

C. L. Britton, G. T. Alley, M. L. Simpson, A. L. Wintenberg, R. J. Yarema, T. Zimmerman, J. Boissevain, W. Collier, B. V. Jacak, J. Simon-Gillo, W. Sondheim, J. P. Sullivan, N. Lockyer

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Abstract

This paper presents the design and characterization of an 8-channel preamplifier-shaper intended for use with silicon strip detectors ranging in capacitance from 1 to 20 pF. The nominal peaking time of the circuit is 200 ns with an adjustment range of ±50 ns. The circuit has a pitch (width) of 85µm/channel with a power dissipation of 1.2 mW/channel and has been fabricated in 2 µm p-wells CMOS. The 0 pF noise is 330 e with a noise slope of 64 e/pF. The design approach is presented as well as both test bench and strip detector measurements.

Original languageEnglish
Pages (from-to)352-355
Number of pages4
JournalIEEE Transactions on Nuclear Science
Volume41
Issue number1
DOIs
StatePublished - Feb 1994

Funding

Manuscript received October 31, 1992; revised September 28, 1993. Research sponsored by the U.S. Department of Energy. The Oak Ridge National Laboratory is managed by Martin Marietta Energy Systems, Inc. for the US. Department of Energy under contract no. DE-ACO5- 840R21400.

FundersFunder number
U.S. Department of Energy

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