Design and analysis of an FPGA-based active feedback damping system for the spallation neutron source

Zaipeng Xie, Michael Schulte, Craig Deibele

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

The Spallation Neutron Source (SNS) at the Oak Ridge National Laboratory is a high-intensity proton-based accelerator that produces neutron beams for neutron-scattering research. As the most powerful pulsed neutron source in the world, the SNS accelerator has experienced an unprecedented beam instability that has a wide bandwidth (0 to 300 MHz) and fast growth time (10 to 100 μs). In this paper, we propose and analyze several FPGA-based designs for an active feedback damping system. This signal processing system is the first FPGA-based design for active feedback damping of wideband instabilities in high-intensity accelerators. It can effectively mitigate instabilities in high-intensity protons beams, reduce radiation, and boost the accelerator's luminosity performance. Unlike existing systems, which are designed using analog components, our FPGA-based active feedback damping system offers programmability while maintaining high performance. To meet the system throughput and latency requirements, we proposed these designs based on detailed analysis of resource and performance tradeoffs. We mapped these designs onto a reconfigurable platform that includes Xilinx® Virtex-II Pro FPGAs and high-speed analog-to-digital and digital-to-analog converters. Our results show that our FPGA-based active feedback damping system can provide increased flexibility and improved signal processing performance that are not feasible with existing analog systems.

Original languageEnglish
Title of host publication2010 IEEE Workshop on Signal Processing Systems, SiPS 2010 - Proceedings
Pages204-209
Number of pages6
DOIs
StatePublished - 2010
Externally publishedYes
Event2010 IEEE Workshop on Signal Processing Systems, SiPS 2010 - San Francisco, CA, United States
Duration: Oct 6 2010Oct 8 2010

Publication series

NameIEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
ISSN (Print)1520-6130

Conference

Conference2010 IEEE Workshop on Signal Processing Systems, SiPS 2010
Country/TerritoryUnited States
CitySan Francisco, CA
Period10/6/1010/8/10

Keywords

  • FIR digital filters
  • FPGA
  • Parallel architectures
  • Particle beam stability
  • Real time systems

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