@inproceedings{9fc6e1ee53304666965bd1e7ff780863,
title = "Design and analysis of a dynamically reconfigurable network processor",
abstract = "The combination of high-performance processing power and flexibility found in network processors (NPs) has made them a good solution for today's packet processing needs. Similarly, the emerging technology of reconfigurable computing (RC) has made advances in packet processing as well as other point-solution markets. Current NP designs offer configurable elements but generally do not use dynamic RC techniques for run-time reconfiguration. Incorporating RC into NP designs to enhance packet processing is a natural progression for both of these emerging technologies. This paper presents the simulation results of a novel design for a RC-enhanced NP based on the Intel IXP1200 NIC design philosophy. The enhanced NP's performance is compared to that of the baseline NP in terms of three normalized traffic patterns and a case-study traffic pattern based on a military application. The results demonstrate that the enhanced NP significantly outperforms the baseline NP design in terms of latency for prioritized traffic that is non-uniform.",
keywords = "Application specific integrated circuits, Costs, Internet, Protocols, Runtime, Spine, Switches, Telecommunication traffic, Traffic control, Wire",
author = "Troxel, {I. A.} and George, {A. D.} and S. Oral",
note = "Publisher Copyright: {\textcopyright} 2002 IEEE.; 27th Annual IEEE Conference on Local Computer Networks, LCN 2002 ; Conference date: 06-11-2002 Through 08-11-2002",
year = "2002",
doi = "10.1109/LCN.2002.1181821",
language = "English",
series = "Proceedings - Conference on Local Computer Networks, LCN",
publisher = "IEEE Computer Society",
pages = "483--492",
booktitle = "Proceedings - LCN 2002",
}