TY - GEN
T1 - Demystifying the Characteristics of High Bandwidth Memory for Real-Time Systems
AU - Asifuzzaman, Kazi
AU - Abuelala, Mohamed
AU - Hassan, Mohamed
AU - Cazorla, Francisco J.
N1 - Publisher Copyright:
©2021 IEEE
PY - 2021
Y1 - 2021
N2 - The number of functionalities controlled by software on every critical real-time product is on the rise in domains like automotive, avionics and space. To implement these advanced functionalities, software applications increasingly adopt artificial intelligence algorithms that manage massive amounts of data transmitted from various sensors. This translates into unprecedented memory performance requirements in critical systems that the commonly used DRAM memories struggle to provide. High-Bandwidth Memory (HBM) can satisfy these requirements offering high bandwidth, low power and high-integration capacity features. However, it remains unclear whether the predictability and isolation properties of HBM are compatible with the requirements of critical embedded systems. In this work, we perform to our knowledge the first timing analysis of HBM. We show the unique structural and timing characteristics of HBM with respect to DRAM memories and how they can be exploited for better time predictability, with emphasis on increased isolation among tasks and reduced worst-case memory latency.
AB - The number of functionalities controlled by software on every critical real-time product is on the rise in domains like automotive, avionics and space. To implement these advanced functionalities, software applications increasingly adopt artificial intelligence algorithms that manage massive amounts of data transmitted from various sensors. This translates into unprecedented memory performance requirements in critical systems that the commonly used DRAM memories struggle to provide. High-Bandwidth Memory (HBM) can satisfy these requirements offering high bandwidth, low power and high-integration capacity features. However, it remains unclear whether the predictability and isolation properties of HBM are compatible with the requirements of critical embedded systems. In this work, we perform to our knowledge the first timing analysis of HBM. We show the unique structural and timing characteristics of HBM with respect to DRAM memories and how they can be exploited for better time predictability, with emphasis on increased isolation among tasks and reduced worst-case memory latency.
UR - http://www.scopus.com/inward/record.url?scp=85124131556&partnerID=8YFLogxK
U2 - 10.1109/ICCAD51958.2021.9643473
DO - 10.1109/ICCAD51958.2021.9643473
M3 - Conference contribution
AN - SCOPUS:85124131556
T3 - IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
BT - 2021 40th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2021 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 40th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2021
Y2 - 1 November 2021 through 4 November 2021
ER -