Compute, memory, and orchestration: Specialized architecture in edge computing

Task-specific core assignment is a well-known technique of dedicating cores for specific tasks. This technique is effective in virtualization and High Performance computing (HPC) work flows. A common set of edge computing tasks includes lightweight computation, data and sensor signal streaming, and machine learning computation. For these types of applications, we propose a generic architecture by focusing on three main components: Compute, Memory orchestration, and Networking (CMN) as shown in Figure 1. Edge computing is an increasingly popular computing paradigm focused on the reduction of application latency and power consumption by placing computing devices close to a consumer and leveraging remote cloud or HPC systems. The devices enabling this paradigm are generally resource constrained such as ARM-based and Raspberry PI platforms. Many of the ARM-based CPUs enabling these devices are equipped with multiple computing cores with systems ranging from 4 cores to 32 cores [2]. With increased number of cores, the efficiency of these devices has also increased, and indeed many of them provide good performance while maintaining lower power consumption.