Abstract
The comparison in electrical properties of Pt/Sr0.75Bi2.4Ta2O9(SBT)/CeO 2/Si (MFIS) and Pt/SBT/Si (MFS) stuctures have been investigated for the gate oxide of nondestructive read out-ferroelectric memory. For Pt/SBT/CeO2/Si thin film structure, interfaces of SBT/CeO2 and CeO2/Si are clean from high resolution transmission electron microscopy (HRTEM). Memory windows of the MFIS structure are in the range of 1̃2 V at capacitance-voltage characteristics. On the other hand, MFS structure have much smaller memory window (0.3 V) at high voltage due to a poor interface, which is the mixed region of SBT and Si. Leakage current of Pt/SBT/CeO2/Si structure is about one order lower than SBT/Si structure. Consequently, SBT/CeO2/Si is a promising gate structure for NDRO-FRAM.
| Original language | English |
|---|---|
| Pages (from-to) | S1414-S1416 |
| Journal | Journal of the Korean Physical Society |
| Volume | 32 |
| Issue number | 4 SUPPL. |
| State | Published - 1998 |
| Externally published | Yes |