Collaborative circuit designs using the CRAFT repository

Adam Brinckman, Ewa Deelman, Sandeep Gupta, Jarek Nabrzyski, Soowang Park, Rafael Ferreira da Silva, Ian J. Taylor, Karan Vahi

Research output: Contribution to journalArticlepeer-review

4 Scopus citations

Abstract

This paper provides an overview of the CRAFT repository, which exposes a collaborative gateway enabling circuit designers to share methods, documentation and intellectual property. The main goal for the repository's development is to ensure that future designs for custom integrated circuits need not be reinvented for each design and fabrication cycle. This paper presents the architecture, design, and implementation of the collaborative repository, which capitalizes on the recent advances in production quality open-source collaborative frameworks, which are interfaced using a lightweight Javascript front-end to satisfy the requirements of the DARPA's CRAFT program. The repository has been developed as an EmberJS application (front-end), that interacts with an instance of the Open Science Framework (OSF). This paper contextualizes the framework from the viewpoint of circuit designers and outlines the advantages of the tools and visualizations offered by the repository, in terms of increasing the efficiency of designers’ tasks. To this end, we also provide a description of two specific tools that have been exposed using the repository, which build on JSON schemas and allow users to develop and visualize the circuit design flow diagrams and the intellectual property they can reuse to accelerate their design process.

Original languageEnglish
Pages (from-to)841-853
Number of pages13
JournalFuture Generation Computer Systems
Volume94
DOIs
StatePublished - May 2019
Externally publishedYes

Funding

This work was funded by DARPA under contract #HR0011-16-C-0043 “Repository and Workflows for Accelerating Circuit Realization (RACE)”. Gupta ’s research is in the area of computer aided design of digital systems with a special emphasis on exposing fabrication imperfections and mitigating their impact. He is coauthor of a well known textbook, Testing of Digital Systems. He is a recipient of a Silver Medal from the Indian Institute of Technology, Kharagpur, the NSF CAREER award, the Northrop-Grumman Assistant Professorship award, and the Distinguished Service Award from the Academic Senate.

FundersFunder number
National Science Foundation
Defense Advanced Research Projects Agency0011-16-C-0043
Indian Institute of Technology Kharagpur

    Keywords

    • Chip design
    • Collaborative environments
    • Design flows

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