Abstract
The total ionizing dose (TID) response of double-gate SiGe-SiO2/rm HfO2 \ pMOS FinFET devices is investigated under different device bias conditions. Negative bias irradiation leads to the worst-case degradation due to increased hole trapping in the HfO2 layer, in contrast to what is typically observed for devices with SiO2 or HfO2 gate dielectrics. This occurs in the devices because radiation-induced holes that are generated in the SiO2 interfacial layer can transport and become trapped in the HfO2 under negative bias, leading to a more negative threshold voltage shift than observed at 0 V bias. Similarly, radiation-induced electrons that are generated in the SiO2 interfacial layer can transport into the HfO2 and become trapped under positive bias, leading to a more positive threshold voltage shift than observed at 0 V bias.
Original language | English |
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Article number | 6945913 |
Pages (from-to) | 2834-2838 |
Number of pages | 5 |
Journal | IEEE Transactions on Nuclear Science |
Volume | 61 |
Issue number | 6 |
DOIs | |
State | Published - Dec 1 2014 |
Externally published | Yes |
Keywords
- Double-gate FinFETs
- HfO
- SiGe
- threshold voltage shift
- total ionizing dose