AYUSH: A Technique for Extending Lifetime of SRAM-NVM Hybrid Caches

Sparsh Mittal, Jeffrey S. Vetter

Research output: Contribution to journalArticlepeer-review

34 Scopus citations

Abstract

Recently, researchers have explored way-based hybrid SRAM-NVM (non-volatile memory) last level caches (LLCs) to bring the best of SRAM and NVM together. However, the limited write endurance of NVMs restricts the lifetime of these hybrid caches. We present AYUSH, a technique to enhance the lifetime of hybrid caches, which works by using data-migration to preferentially use SRAM for storing frequently-reused data. Microarchitectural simulations confirm that AYUSH achieves larger improvement in lifetime than a previous technique and also maintains performance and energy efficiency. For single, dual and quad-core workloads, the average increase in cache lifetime with AYUSH is 6.90, 24.06 and 47.62×, respectively.

Original languageEnglish
Article number6892940
Pages (from-to)115-118
Number of pages4
JournalIEEE Computer Architecture Letters
Volume14
Issue number2
DOIs
StatePublished - Jul 1 2015

Keywords

  • Non-volatile memory (NVM)
  • SRAM-NVM cache
  • device lifetime
  • hybrid cache
  • write endurance

Fingerprint

Dive into the research topics of 'AYUSH: A Technique for Extending Lifetime of SRAM-NVM Hybrid Caches'. Together they form a unique fingerprint.

Cite this