An FPGA-Based Neuromorphic Processor with All-to-All Connectivity

Disha Maheshwari; Aaron Young; Prasanna Date; Shruti Kulkarni; Brett Witherspoon; Narsinga Rao Miniskar

doi:10.1109/ICRC60800.2023.10386808

An FPGA-Based Neuromorphic Processor with All-to-All Connectivity

Disha Maheshwari, Aaron Young, Prasanna Date, Shruti Kulkarni, Brett Witherspoon, Narsinga Rao Miniskar

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Scopus citations

Abstract

Neuromorphic computing is a promising paradigm for future energy-efficient computing. At present, however, it is in its nascent stages - most hardware implementations are research-grade, commercial products are not available, and the software tools are not production-ready. The lack of hardware and software tools makes neuromorphic computing inaccessible to researchers around the globe. To this extent, we intend to build a low-cost, open-source, FPGA-based digital neuromorphic processor that can be used by researchers worldwide. In this paper, we present a preliminary implementation of the processor on a Xilinx Artix-7 FPGA using SystemVerilog. Our implementation supports the integrate-and-fire neuron with two parameters each for neurons and synapses. It also features all-to-all connectivity among neurons on the hardware. We test our implementation on four cases: bars and stripes datasets, shortest path algorithm, logic gates, and 8-3 encoder. We also perform a scalability study to understand the resource utilization of the FPGA as the number of all-to-all connected neurons increases. With our implementation, the Artix- 7 supports 65 neurons with all-to-all connectivity. Moreover, all the test cases mentioned above achieve 100% accuracy.

Original language	English
Title of host publication	2023 IEEE International Conference on Rebooting Computing, ICRC 2023
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9798350382044
DOIs	https://doi.org/10.1109/ICRC60800.2023.10386808
State	Published - 2023
Event	8th IEEE International Conference on Rebooting Computing, ICRC 2023 - San Diego, United States Duration: Dec 5 2023 → Dec 6 2023

Publication series

Name	2023 IEEE International Conference on Rebooting Computing, ICRC 2023

Conference

Conference	8th IEEE International Conference on Rebooting Computing, ICRC 2023
Country/Territory	United States
City	San Diego
Period	12/5/23 → 12/6/23

Funding

Many research-level neuromorphic chips have been designed at various universities, including Neurogrid [6], Braindrop [7], and NeuRRAM [8]. Other projects are funded by larger initiatives (e.g., BrainScaleS [7] and SpiNNaker [9] are funded by the Human Brain Project). Some neuromorphic chips are designed by industry, including Intel’s Loihi [10] and IBM’s TrueNorth [11]. Although these hardware designs perform well and are good for research, they are inaccessible outside the

Keywords

Design Automation
FPGA
Neuromorphic Computing
Neuromorphic Hardware

Access to Document

10.1109/ICRC60800.2023.10386808

Cite this

Maheshwari, D., Young, A., Date, P., Kulkarni, S., Witherspoon, B., & Miniskar, N. R. (2023). An FPGA-Based Neuromorphic Processor with All-to-All Connectivity. In 2023 IEEE International Conference on Rebooting Computing, ICRC 2023 (2023 IEEE International Conference on Rebooting Computing, ICRC 2023). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICRC60800.2023.10386808

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abstract = "Neuromorphic computing is a promising paradigm for future energy-efficient computing. At present, however, it is in its nascent stages - most hardware implementations are research-grade, commercial products are not available, and the software tools are not production-ready. The lack of hardware and software tools makes neuromorphic computing inaccessible to researchers around the globe. To this extent, we intend to build a low-cost, open-source, FPGA-based digital neuromorphic processor that can be used by researchers worldwide. In this paper, we present a preliminary implementation of the processor on a Xilinx Artix-7 FPGA using SystemVerilog. Our implementation supports the integrate-and-fire neuron with two parameters each for neurons and synapses. It also features all-to-all connectivity among neurons on the hardware. We test our implementation on four cases: bars and stripes datasets, shortest path algorithm, logic gates, and 8-3 encoder. We also perform a scalability study to understand the resource utilization of the FPGA as the number of all-to-all connected neurons increases. With our implementation, the Artix- 7 supports 65 neurons with all-to-all connectivity. Moreover, all the test cases mentioned above achieve 100\% accuracy.",

keywords = "Design Automation, FPGA, Neuromorphic Computing, Neuromorphic Hardware",

author = "Disha Maheshwari and Aaron Young and Prasanna Date and Shruti Kulkarni and Brett Witherspoon and Miniskar, \{Narsinga Rao\}",

note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 8th IEEE International Conference on Rebooting Computing, ICRC 2023 ; Conference date: 05-12-2023 Through 06-12-2023",

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Maheshwari, D, Young, A , Date, P , Kulkarni, S , Witherspoon, B & Miniskar, NR 2023, An FPGA-Based Neuromorphic Processor with All-to-All Connectivity. in 2023 IEEE International Conference on Rebooting Computing, ICRC 2023. 2023 IEEE International Conference on Rebooting Computing, ICRC 2023, Institute of Electrical and Electronics Engineers Inc., 8th IEEE International Conference on Rebooting Computing, ICRC 2023, San Diego, United States, 12/5/23. https://doi.org/10.1109/ICRC60800.2023.10386808

An FPGA-Based Neuromorphic Processor with All-to-All Connectivity. / Maheshwari, Disha; Young, Aaron ; Date, Prasanna et al.
2023 IEEE International Conference on Rebooting Computing, ICRC 2023. Institute of Electrical and Electronics Engineers Inc., 2023. (2023 IEEE International Conference on Rebooting Computing, ICRC 2023).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Young, Aaron

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AU - Witherspoon, Brett

AU - Miniskar, Narsinga Rao

PY - 2023

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AB - Neuromorphic computing is a promising paradigm for future energy-efficient computing. At present, however, it is in its nascent stages - most hardware implementations are research-grade, commercial products are not available, and the software tools are not production-ready. The lack of hardware and software tools makes neuromorphic computing inaccessible to researchers around the globe. To this extent, we intend to build a low-cost, open-source, FPGA-based digital neuromorphic processor that can be used by researchers worldwide. In this paper, we present a preliminary implementation of the processor on a Xilinx Artix-7 FPGA using SystemVerilog. Our implementation supports the integrate-and-fire neuron with two parameters each for neurons and synapses. It also features all-to-all connectivity among neurons on the hardware. We test our implementation on four cases: bars and stripes datasets, shortest path algorithm, logic gates, and 8-3 encoder. We also perform a scalability study to understand the resource utilization of the FPGA as the number of all-to-all connected neurons increases. With our implementation, the Artix- 7 supports 65 neurons with all-to-all connectivity. Moreover, all the test cases mentioned above achieve 100% accuracy.

KW - Design Automation

KW - FPGA

KW - Neuromorphic Computing

KW - Neuromorphic Hardware

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DO - 10.1109/ICRC60800.2023.10386808

M3 - Conference contribution

AN - SCOPUS:85184832709

T3 - 2023 IEEE International Conference on Rebooting Computing, ICRC 2023

BT - 2023 IEEE International Conference on Rebooting Computing, ICRC 2023

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 8th IEEE International Conference on Rebooting Computing, ICRC 2023

Y2 - 5 December 2023 through 6 December 2023

ER -

Maheshwari D, Young A , Date P , Kulkarni S , Witherspoon B , Miniskar NR. An FPGA-Based Neuromorphic Processor with All-to-All Connectivity. In 2023 IEEE International Conference on Rebooting Computing, ICRC 2023. Institute of Electrical and Electronics Engineers Inc. 2023. (2023 IEEE International Conference on Rebooting Computing, ICRC 2023). doi: 10.1109/ICRC60800.2023.10386808

An FPGA-Based Neuromorphic Processor with All-to-All Connectivity

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