Abstract
Memory consistency model is crucial to the performance of shared-memory multiprocessors, and in current architectures several different models are adopted. In this paper, using graph algorithms for illustrative purposes, we consider the impact of memory model on the implementation and performance of parallel algorithms on shared-memory multiprocessors. We show that the implementation of PRAM algorithms is largely "oblivious" of the underlying memory model, and has good performance on relaxed models. More importantly, we show that different memory models can favor drastically different algorithm designs.
| Original language | English |
|---|---|
| Pages (from-to) | 388-393 |
| Number of pages | 6 |
| Journal | Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Systems |
| State | Published - 2006 |
| Externally published | Yes |
| Event | 18th IASTED International Conference on Parallel and Distributed Computing and Systems, PDCS 2006 - Dallas, TX, United States Duration: Nov 13 2006 → Nov 15 2006 |
Keywords
- Consistency models
- Parallel algorithms
- Shared memory
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