TY - JOUR
T1 - A technique for improving lifetime of non-volatile caches using write-minimization
AU - Mittal, Sparsh
AU - Vetter, Jeffrey
N1 - Publisher Copyright:
© 2016 by the authors; licensee MDPI, Basel, Switzerland.
PY - 2016/1/18
Y1 - 2016/1/18
N2 - While non-volatile memories (NVMs) provide high-density and low-leakage, they also have low write-endurance. This, along with the write-variation introduced by the cache management policies, can lead to very small cache lifetime. In this paper, we propose ENLIVE, a technique for ENhancing the LIfetime of non-Volatile cachEs. Our technique uses a small SRAM (static random access memory) storage, called HotStore. ENLIVE detects frequently written blocks and transfers them to the HotStore so that they can be accessed with smaller latency and energy. This also reduces the number of writes to the NVM cache which improves its lifetime. We present microarchitectural schemes for managing the HotStore. Simulations have been performed using an x86-64 simulator and benchmarks from SPEC2006 suite. We observe that ENLIVE provides higher improvement in lifetime and better performance and energy efficiency than two state-of-the-art techniques for improving NVM cache lifetime. ENLIVE provides 8.47x, 14.67x and 15.79 x improvement in lifetime or two, four and eight core systems, respectively. In addition, it works well for a range of system and algorithm parameters and incurs only small overhead.
AB - While non-volatile memories (NVMs) provide high-density and low-leakage, they also have low write-endurance. This, along with the write-variation introduced by the cache management policies, can lead to very small cache lifetime. In this paper, we propose ENLIVE, a technique for ENhancing the LIfetime of non-Volatile cachEs. Our technique uses a small SRAM (static random access memory) storage, called HotStore. ENLIVE detects frequently written blocks and transfers them to the HotStore so that they can be accessed with smaller latency and energy. This also reduces the number of writes to the NVM cache which improves its lifetime. We present microarchitectural schemes for managing the HotStore. Simulations have been performed using an x86-64 simulator and benchmarks from SPEC2006 suite. We observe that ENLIVE provides higher improvement in lifetime and better performance and energy efficiency than two state-of-the-art techniques for improving NVM cache lifetime. ENLIVE provides 8.47x, 14.67x and 15.79 x improvement in lifetime or two, four and eight core systems, respectively. In addition, it works well for a range of system and algorithm parameters and incurs only small overhead.
KW - Cache
KW - Device lifetime
KW - Non-volatile memory (NVM)
KW - SRAM
KW - Temporal locality
KW - Write minimization
KW - Write-endurance
UR - http://www.scopus.com/inward/record.url?scp=84961121803&partnerID=8YFLogxK
U2 - 10.3390/jlpea6010001
DO - 10.3390/jlpea6010001
M3 - Article
AN - SCOPUS:84961121803
SN - 2079-9268
VL - 6
JO - Journal of Low Power Electronics and Applications
JF - Journal of Low Power Electronics and Applications
IS - 1
ER -