Abstract
This paper presents the first sparse direct solver for distributed memory systems comprising hybrid multicourse CPU and Intel Xeon Pico-processors. It builds on the algorithmic approach of SuperLU-DIST, which is right-looking and statically pivoted. Our contribution is a novel algorithm, called the HALO. The name is shorthand for highly asynchronous lazy offload, it refers tithe way the algorithm combines highly aggressive use of asynchrony with accelerated offload, lazy updates, and data shadowing (a la halo or ghost zones), all of which serve to hide and reduce communication, whether to local memory, across the network, or over PCIe. We further augment HALO with a model-driven autotuning heuristicthat chooses the intra-node division of labor among CPU and Xeon Pico-processor components. When integrated into SuperLU-DIST and evaluated on a variety of realistic test problems in both single-node and multi-node configurations, the resulting implementation achieves speedups of unto 2.5× over an already efficient multicourse CPU implementation, and achieves up to 83% of a machine-specific upper-bound that we haveestimated. Our analysis quantifies how well our implementation performs and allows us to speculate on the potential speedups that might come from variety of future improvements to the algorithm and system.
Original language | English |
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Title of host publication | Proceedings - 2015 IEEE 29th International Parallel and Distributed Processing Symposium, IPDPS 2015 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 71-81 |
Number of pages | 11 |
ISBN (Electronic) | 9781479986484 |
DOIs | |
State | Published - Jul 17 2015 |
Externally published | Yes |
Event | 29th IEEE International Parallel and Distributed Processing Symposium, IPDPS 2015 - Hyderabad, India Duration: May 25 2015 → May 29 2015 |
Publication series
Name | Proceedings - 2015 IEEE 29th International Parallel and Distributed Processing Symposium, IPDPS 2015 |
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Conference
Conference | 29th IEEE International Parallel and Distributed Processing Symposium, IPDPS 2015 |
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Country/Territory | India |
City | Hyderabad |
Period | 05/25/15 → 05/29/15 |
Funding
This work was supported in part by the National Science Foundation (NSF) under NSF CAREER award number 0953100 and NSF SI2-SSI Award 1339745
Keywords
- Communication-avoiding algorithm
- GPU
- Heterogeneous computing
- MPI
- OpenMP
- Sparse Direct Solver
- Xeon-Phi acceleration