A secure gateway for enabling application specific integrated circuit design collaborations

Steve Bogol; Paul Brenner; Adam Brinckman; Ewa Deelman; Rafael Ferreira da Silva; Sandeep Gupta; Jarek Nabrzyski; Soowang Park; Damian Perez; Sarah Rucker; Mats Rynge; Ian J. Taylor; Karan Vahi; Matt Vander Werf; Sebastian Wyngaard

A secure gateway for enabling application specific integrated circuit design collaborations

Steve Bogol
, Paul Brenner
, Adam Brinckman
, Ewa Deelman
, Rafael Ferreira da Silva
, Sandeep Gupta
, Jarek Nabrzyski
, Soowang Park
, Damian Perez
, Sarah Rucker
, Mats Rynge
, Ian J. Taylor
, Karan Vahi
, Matt Vander Werf
, Sebastian Wyngaard

Data Lifecycle Technologies

Research output: Contribution to journal › Conference article › peer-review

Abstract

Leading CAD companies are currently developing virtual secure environments to help lower the barriers for adopting new ASIC design flows. However, such services are proprietary, lack key features, and present barriers for collaboration and sharing. This paper covers the transition of the CRAFT repository, originally designed as a repository for discovery and documentation of ASIC design flows, to a fully secure environment called the CRAFT Vault hosted in Amazon Gov Cloud that allows designers to collaborate and actually implement these flows. The Vault is a fully configured environment that is deployed with all the necessary electronic design automation tools and IP making it easier for end users to implement a CRAFT Design Flow, augmented with Blockchain functionalities to provide a non-repudiable audit trail of what happened and when.

Original language	English
Journal	CEUR Workshop Proceedings
Volume	2975
State	Published - 2021
Event	11th International Workshop on Science Gateways, IWSG 2019 - Ljubljana, Slovenia Duration: Jun 12 2019 → Jun 14 2019

Funding

Acknowledgments. This work was funded by DARPA under contract #HR0011-16-C-0043 Repository and Workflows for Accelerating Circuit Realization (RACE).

Keywords

Chip design
Collaborative environments
Design flows

Cite this

@article{cd1c966004d645c1aa33f0829471f3b8,

title = "A secure gateway for enabling application specific integrated circuit design collaborations",

abstract = "Leading CAD companies are currently developing virtual secure environments to help lower the barriers for adopting new ASIC design flows. However, such services are proprietary, lack key features, and present barriers for collaboration and sharing. This paper covers the transition of the CRAFT repository, originally designed as a repository for discovery and documentation of ASIC design flows, to a fully secure environment called the CRAFT Vault hosted in Amazon Gov Cloud that allows designers to collaborate and actually implement these flows. The Vault is a fully configured environment that is deployed with all the necessary electronic design automation tools and IP making it easier for end users to implement a CRAFT Design Flow, augmented with Blockchain functionalities to provide a non-repudiable audit trail of what happened and when.",

keywords = "Chip design, Collaborative environments, Design flows",

author = "Steve Bogol and Paul Brenner and Adam Brinckman and Ewa Deelman and \{da Silva\}, \{Rafael Ferreira\} and Sandeep Gupta and Jarek Nabrzyski and Soowang Park and Damian Perez and Sarah Rucker and Mats Rynge and Taylor, \{Ian J.\} and Karan Vahi and \{Vander Werf\}, Matt and Sebastian Wyngaard",

note = "Publisher Copyright: Copyright {\textcopyright} 2021 for this paper by its authors. Use permitted under Creative Commons License Attribution 4.0 International (CC BY 4.0).; 11th International Workshop on Science Gateways, IWSG 2019 ; Conference date: 12-06-2019 Through 14-06-2019",

year = "2021",

language = "English",

volume = "2975",

journal = "CEUR Workshop Proceedings",

issn = "1613-0073",

publisher = "CEUR Workshop Proceedings",

}

TY - JOUR

T1 - A secure gateway for enabling application specific integrated circuit design collaborations

AU - Bogol, Steve

AU - Brenner, Paul

AU - Brinckman, Adam

AU - Deelman, Ewa

AU - da Silva, Rafael Ferreira

AU - Gupta, Sandeep

AU - Nabrzyski, Jarek

AU - Park, Soowang

AU - Perez, Damian

AU - Rucker, Sarah

AU - Rynge, Mats

AU - Taylor, Ian J.

AU - Vahi, Karan

AU - Vander Werf, Matt

AU - Wyngaard, Sebastian

PY - 2021

Y1 - 2021

N2 - Leading CAD companies are currently developing virtual secure environments to help lower the barriers for adopting new ASIC design flows. However, such services are proprietary, lack key features, and present barriers for collaboration and sharing. This paper covers the transition of the CRAFT repository, originally designed as a repository for discovery and documentation of ASIC design flows, to a fully secure environment called the CRAFT Vault hosted in Amazon Gov Cloud that allows designers to collaborate and actually implement these flows. The Vault is a fully configured environment that is deployed with all the necessary electronic design automation tools and IP making it easier for end users to implement a CRAFT Design Flow, augmented with Blockchain functionalities to provide a non-repudiable audit trail of what happened and when.

AB - Leading CAD companies are currently developing virtual secure environments to help lower the barriers for adopting new ASIC design flows. However, such services are proprietary, lack key features, and present barriers for collaboration and sharing. This paper covers the transition of the CRAFT repository, originally designed as a repository for discovery and documentation of ASIC design flows, to a fully secure environment called the CRAFT Vault hosted in Amazon Gov Cloud that allows designers to collaborate and actually implement these flows. The Vault is a fully configured environment that is deployed with all the necessary electronic design automation tools and IP making it easier for end users to implement a CRAFT Design Flow, augmented with Blockchain functionalities to provide a non-repudiable audit trail of what happened and when.

KW - Chip design

KW - Collaborative environments

KW - Design flows

UR - https://www.scopus.com/pages/publications/85117862649

M3 - Conference article

AN - SCOPUS:85117862649

SN - 1613-0073

VL - 2975

JO - CEUR Workshop Proceedings

JF - CEUR Workshop Proceedings

T2 - 11th International Workshop on Science Gateways, IWSG 2019

Y2 - 12 June 2019 through 14 June 2019

ER -

A secure gateway for enabling application specific integrated circuit design collaborations

Abstract

Funding

Keywords

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