A scalable cross-platform infrastructure for application performance tuning using hardware counters

S. Browne; J. Dongarra; N. Garner; K. London; P. Mucci

doi:10.1109/SC.2000.10029

A scalable cross-platform infrastructure for application performance tuning using hardware counters

S. Browne, J. Dongarra, N. Garner, K. London, P. Mucci

Computer Science and Mathematics Div

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

109 Scopus citations

Abstract

The purpose of the PAPI project is to specify a standard API for accessing hardware performance counters available on most modern microprocessors. These counters exist as a small set of registers that count "events", which are occurrences of specific signals and states related to the processor's function. Monitoring these events facilitates correlation between the structure of source/object code and the efficiency of the mapping of that code to the underlying architecture. This correlation has a variety of uses in performance analysis and tuning. The PAPI project has proposed a standard set of hardware events and a standard cross-platform library interface to the underlying counter hardware. The PAPI library has been or is in the process of being implemented on all major HPC platforms. The PAPI project is developing end-user tools for dynamically selecting and displaying hardware counter performance data. PAPI support is also being incorporated into a number of third-party tools.

Original language	English
Title of host publication	SC 2000 - Proceedings of the 2000 ACM/IEEE Conference on Supercomputing
Publisher	Association for Computing Machinery
ISBN (Electronic)	0780398025
DOIs	https://doi.org/10.1109/SC.2000.10029
State	Published - 2000
Event	2000 ACM/IEEE Conference on Supercomputing, SC 2000 - Dallas, United States Duration: Nov 4 2000 → Nov 10 2000

Publication series

Name	Proceedings of the International Conference on Supercomputing
Volume	2000-November

Conference

Conference	2000 ACM/IEEE Conference on Supercomputing, SC 2000
Country/Territory	United States
City	Dallas
Period	11/4/00 → 11/10/00

Funding

This work was partially supported by ERDC MSRC under prime contract #DAHC94-96-C-0002, b y ARL MSRC under prime contract #DACHC94-96-C-0010, by NSF PACI under Cooperative Agreement #ACI-9619019, and by DOE ASCI LANL under contract #04830-001-99 4R. The authors would like to thank John Levesque and Luiz DeRose at the IBM Advanced Computing Technology Center for assistance with the IBM reference implementation and integration of PAPI with SvPablo, Curtis Janssen at Sandia National Laboratory for integration with vprof and comments on PAPI profiling, Alex Poulos and Uros Prestor at SGI/Cray for assistance with the MIPS R10K/R12K implementation, and Monika ten Bruggencate at SGI/Cray for assistance with the Cray T3E implementation. The authors would also like to thank the Parallel Tools Consortium (Ptools) (http://www.ptools.org/) for sponsoring PAPI as a Ptools project.

Funders	Funder number
DOE ASCI LANL	04830-001-99 4R
ERDC MSRC	94-96-C-0002
John Levesque and Luiz DeRose
MSRC	94-96-C-0010
Parallel Tools Consortium
National Science Foundation	-9619019
International Business Machines Corporation

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10.1109/SC.2000.10029

Cite this

Browne, S., Dongarra, J., Garner, N., London, K., & Mucci, P. (2000). A scalable cross-platform infrastructure for application performance tuning using hardware counters. In SC 2000 - Proceedings of the 2000 ACM/IEEE Conference on Supercomputing (Proceedings of the International Conference on Supercomputing; Vol. 2000-November). Association for Computing Machinery. https://doi.org/10.1109/SC.2000.10029

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Browne, S, Dongarra, J, Garner, N, London, K & Mucci, P 2000, A scalable cross-platform infrastructure for application performance tuning using hardware counters. in SC 2000 - Proceedings of the 2000 ACM/IEEE Conference on Supercomputing. Proceedings of the International Conference on Supercomputing, vol. 2000-November, Association for Computing Machinery, 2000 ACM/IEEE Conference on Supercomputing, SC 2000, Dallas, United States, 11/4/00. https://doi.org/10.1109/SC.2000.10029

A scalable cross-platform infrastructure for application performance tuning using hardware counters. / Browne, S.; Dongarra, J.; Garner, N. et al.
SC 2000 - Proceedings of the 2000 ACM/IEEE Conference on Supercomputing. Association for Computing Machinery, 2000. (Proceedings of the International Conference on Supercomputing; Vol. 2000-November).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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A scalable cross-platform infrastructure for application performance tuning using hardware counters

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