TY - GEN
T1 - A Novel Four Terminal Integrated Submodule Modular Multilevel Converter
AU - Mishra, Rahul
AU - Agarwal, Vivek
N1 - Publisher Copyright:
© 2018 IEEE.
PY - 2018/7/2
Y1 - 2018/7/2
N2 - Modular multilevel converters (MMC) are extensively used in high voltage direct current (HVDC), flexible AC transmission system (FACTS) and high voltage, high power applications such as motor drive systems. The conventional MMC suffers from low frequency fluctuation in submodule (SM) capacitor's voltage. As a result of this, employment of high value capacitance (typically in mF) becomes mandatory. In addition to this, all the capacitors in conventional MMC are not actively utilized by the circuit as some capacitors get bypassed or remain floating. The two aforementioned issues make the use of bulky capacitors mandatory and also increase the capacitor count in the topology. In this paper, a novel scheme of sharing the capacitors between sub-modules is introduced to mitigate these issues. A novel four terminal integrated SM (FTIS) is proposed by combining the upper and lower SM of the conventional MMC. This concept reduces the number of SM capacitors to half as compared to the conventional MMC topology. Three-level and five-level FTIS-MMC are simulated and validated in MATLAB/SIMULINK environment. Various waveforms are showcased under different conditions to show the efficacy of proposed converter.
AB - Modular multilevel converters (MMC) are extensively used in high voltage direct current (HVDC), flexible AC transmission system (FACTS) and high voltage, high power applications such as motor drive systems. The conventional MMC suffers from low frequency fluctuation in submodule (SM) capacitor's voltage. As a result of this, employment of high value capacitance (typically in mF) becomes mandatory. In addition to this, all the capacitors in conventional MMC are not actively utilized by the circuit as some capacitors get bypassed or remain floating. The two aforementioned issues make the use of bulky capacitors mandatory and also increase the capacitor count in the topology. In this paper, a novel scheme of sharing the capacitors between sub-modules is introduced to mitigate these issues. A novel four terminal integrated SM (FTIS) is proposed by combining the upper and lower SM of the conventional MMC. This concept reduces the number of SM capacitors to half as compared to the conventional MMC topology. Three-level and five-level FTIS-MMC are simulated and validated in MATLAB/SIMULINK environment. Various waveforms are showcased under different conditions to show the efficacy of proposed converter.
KW - Capacitor's count reduction
KW - Four terminal integrated submodule (FTIS)
KW - Modular multilevel converter (MMC)
UR - http://www.scopus.com/inward/record.url?scp=85065984804&partnerID=8YFLogxK
U2 - 10.1109/PEDES.2018.8707503
DO - 10.1109/PEDES.2018.8707503
M3 - Conference contribution
AN - SCOPUS:85065984804
T3 - Proceedings of 2018 IEEE International Conference on Power Electronics, Drives and Energy Systems, PEDES 2018
BT - Proceedings of 2018 IEEE International Conference on Power Electronics, Drives and Energy Systems, PEDES 2018
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 8th IEEE International Conference on Power Electronics, Drives and Energy Systems, PEDES 2018
Y2 - 18 December 2018 through 21 December 2018
ER -
