@inproceedings{ce5086d90da54b01bdb8819271f78feb,
title = "A novel charge sensitive pre-amplifier structure for biological temperature readout applications",
abstract = "Charge sensitive pre-amplifier architectures have been studied for decades for various applications, most of which adopt a gain stage with capacitor feedback to integrate the signal and a reset path to provide DC bias. For the biological temperature readout front-end, we propose a novel structure without the gain stage, which implies a strong potential for fully integrated high frequency applications. The proposed design provides 0.94 mV/pC gain with high conversion linearity while consuming only 1.4 micro watts of power with buffer under a 1.2-V supply rail. The prototype occupying a chip area of 0.038 square millimeter is fabricated in 130 nm standard CMOS process.",
keywords = "Charge amplifier, PVDF, charge integration",
author = "Hanfeng Wang and Song Yuan and Islam, {Syed K.} and Britton, {Charles L.}",
note = "Publisher Copyright: {\textcopyright} 2017 IEEE.; 50th IEEE International Symposium on Circuits and Systems, ISCAS 2017 ; Conference date: 28-05-2017 Through 31-05-2017",
year = "2017",
month = sep,
day = "25",
doi = "10.1109/ISCAS.2017.8050502",
language = "English",
series = "Proceedings - IEEE International Symposium on Circuits and Systems",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "IEEE International Symposium on Circuits and Systems",
}