TY - JOUR
T1 - A multiplicity-vertex detector for the PHENIX experiment at RHIC
AU - Kapustinsky, J.
AU - Boissevain, J.
AU - Bosze, E.
AU - Britton, C.
AU - Chang, J.
AU - Clark, D.
AU - Emery, M.
AU - Ericson, N.
AU - Fung, S. Y.
AU - Jacak, B.
AU - Jaffe, D.
AU - Marek, L.
AU - Seto, R.
AU - Simon-Gillo, J.
AU - Simpson, M.
AU - Smith, R.
AU - Sullivan, J.
AU - Takahashi, Y.
AU - Van Hecke, H.
AU - Walker, J.
AU - Xu, N.
PY - 1997/6/21
Y1 - 1997/6/21
N2 - A Multiplicity-Vertex Detector (MVD) has been designed, and is in construction for the PHENIX Experiment at the Relativistic Heavy Ion Collider (RHIC). The 35 000 channel silicon detector is a two-layer barrel comprised of 112 strip detectors, and two disk-shaped endcaps comprised of 24 wedge-shaped pad detectors. The support structure of the MVD is very low mass, only 0.4% of a radiation length in the central barrel. The detector front-end electronics are a custom CMOS chip set containing preamplifier, discriminator, analog memory unit, and analog-to-digital converter. The system has pipelined acquisition, performs in simultaneous read/write mode, and is clocked by the 10 MHz beam crossing rate at RHIC. These die, together with a pair of commercial FPGAs that are used for control logic, are packaged in a mutlichip-module (MCM). The MCM will be fabricated in the High-Density-Interconnect (HDI) process. The prototype MCM design layout is described.
AB - A Multiplicity-Vertex Detector (MVD) has been designed, and is in construction for the PHENIX Experiment at the Relativistic Heavy Ion Collider (RHIC). The 35 000 channel silicon detector is a two-layer barrel comprised of 112 strip detectors, and two disk-shaped endcaps comprised of 24 wedge-shaped pad detectors. The support structure of the MVD is very low mass, only 0.4% of a radiation length in the central barrel. The detector front-end electronics are a custom CMOS chip set containing preamplifier, discriminator, analog memory unit, and analog-to-digital converter. The system has pipelined acquisition, performs in simultaneous read/write mode, and is clocked by the 10 MHz beam crossing rate at RHIC. These die, together with a pair of commercial FPGAs that are used for control logic, are packaged in a mutlichip-module (MCM). The MCM will be fabricated in the High-Density-Interconnect (HDI) process. The prototype MCM design layout is described.
UR - https://www.scopus.com/pages/publications/0031163820
U2 - 10.1016/S0168-9002(97)00289-1
DO - 10.1016/S0168-9002(97)00289-1
M3 - Article
AN - SCOPUS:0031163820
SN - 0168-9002
VL - 392
SP - 192
EP - 196
JO - Nuclear Instruments and Methods in Physics Research, Section A: Accelerators, Spectrometers, Detectors and Associated Equipment
JF - Nuclear Instruments and Methods in Physics Research, Section A: Accelerators, Spectrometers, Detectors and Associated Equipment
IS - 1-3
ER -