Abstract
A programmable analog memory address list manager has been developed for use with all analog memory-based detector subsystems of PHENIX. The unit provides simultaneous read/write control, cell write-over protection for both a Level-1 trigger decision delay and digitization latency, and re-ordering of AMU addresses following conversion, at a beam crossing rate of 105 ns. Addresses are handled such that up to 5 Level-1 (LVL-1) events can be maintained in the AMU without write-over. Data tagging is implemented for handling overlapping and shared beam-event data packets. Full usage in all PHENIX analog memory-based detector subsystems is accomplished by the use of detector-specific programmable parameters - the number of data samples per valid LVL-1 trigger and the sample spacing. Architectural candidates for the system are discussed with emphasis on implementation implications. Details of the design are presented including application specifics, timing information, and test results from a full implementation using field programmable gate arrays (FPGAs).
| Original language | English |
|---|---|
| Pages (from-to) | 1629-1633 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Nuclear Science |
| Volume | 43 |
| Issue number | 3 PART 2 |
| DOIs | |
| State | Published - 1996 |
Funding
Analog memory units (AMUs) play an important role in many physics experiments as data storage elements [1,2,3]. Use of these elements allows proper handling of delays associated with making trigger decisions and digitization latency [3,4,5]. Published methods used to control analog memory are bit-enabling schemes [1,2] and direct addressing [4]. Bit-enabling methods use individual enables to control the writehead operation of a particular AMU cell or column of cells. In direct addressing the AMU cells are memory mapped, and the addresses are manipulated for write/read operations. Bit-enabling methods can produce unacceptable delays due to the requirement of looking ahead for unprotected cells, which is particularly a problem if FPGAs are used for implementation. Direct addressing methods require the storage and manipulation of an address list (address list management) which can require significant 'Research sponsored by the U.S. Department of Energy and performed at Oak Ridge National Laboratory, managed by Lockheed Martin Energy Systems, Inc. for the U.S. Department of Energy under Contract No. DE-AC05-840R21400.
| Funders | Funder number |
|---|---|
| Lockheed Martin Energy Systems, Inc. | |
| U.S. Department of Energy | |
| Oak Ridge National Laboratory |