A 6F2 DRAM technology in 60nm era for gigabit densities

Changhyun Cho, Sangho Song, Sangho Kim, Sungho Jang, Sungsam Lee, Hyungtak Kim, Yangsoo Sung, Sangmin Jeon, Gisung Yeo, Youngsun Kim, Yungi Kim, Gyoyoung Jin, Kinam Kim

Research output: Contribution to journalConference articlepeer-review

10 Scopus citations

Abstract

A novel process technology for 6F2 DRAM cell at 68nm design rule was for the first time developed. The cell size is 0.028μm2, which is the smallest cell size ever reported. ArF lithography with double expose technology and highly selective etching process were used for patterning of critical layers. This 6F2 cell was made of simple line/space patterns for easy patterning and self-aligned etches to improve process margins. MIM cell capacitor was developed with multi-layer high-k dielectric materials and 11Å equivalent Tox and sub-1fA leakage was confirmed.

Original languageEnglish
Article number1469202
Pages (from-to)36-37
Number of pages2
JournalDigest of Technical Papers - Symposium on VLSI Technology
Volume2005
DOIs
StatePublished - 2005
Externally publishedYes
Event2005 Symposium on VLSI Technology - Kyoto, Japan
Duration: Jun 14 2005Jun 14 2005

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