A 100-ps time-resolution CMOS time-to-digital converter for positron emission tomography imaging applications

Brian K. Swann, Benjamin J. Blalock, Lloyd G. Clonts, David M. Binkley, James M. Rochelle, Eric Breeding, K. Michelle Baldwin

Research output: Contribution to journalArticlepeer-review

122 Scopus citations

Abstract

An integrated CMOS subnanosecond time-to-digital converter (TDC) has been developed and evaluated for positron emission tomography (PET) front-end applications. The TDC architecture combines an accurate digital counter and an analog time interpolation circuit to make the time interval measurement. The dynamic range of the TDC is programmable and can be easily extended without any timing resolution degradation. The converter was designed to operate over a reference clock frequency range of 62.5 MHz up to 100 MHz and can have a bin size as small as 312.5 ps LSB with 100-ns conversion times. Measurements indicate the TDC achieves a DNL of under ±0.20 LSB and INL less than ±0.30 LSB with an rms timing resolution of 0.312 LSB (97.5 ps), very close to the theoretical limit of 0.289 LSB (90 ps). The design is believed to be the first fully integrated CMOS subnanosecond TDC used in PET medical imaging and the first realization of a CMOS TDC that achieves an rms timing resolution below 100 ps within a 100-ns conversion time.

Original languageEnglish
Pages (from-to)1839-1852
Number of pages14
JournalIEEE Journal of Solid-State Circuits
Volume39
Issue number11
DOIs
StatePublished - Nov 2004

Keywords

  • Analog-to-digital converter (ADC)
  • CMOS
  • Comparators
  • Offset correction
  • Positron emission tomography (PET)
  • Sub-nanosecond timing
  • Time-to-amplitude converter (TAC)
  • Time-to-digital converter (TDC)

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