2nd- and 4th-order ΣΔ modulators fabricated in 3.3V 0.5μm SOS-CMOS for high-temperature applications

M. N. Ericson, J. M. Rochelle, M. Bobrek, C. L. Britton, A. Bobrek, B. J. Blalock, R. Schultz, J. A. Moore

Research output: Contribution to conferencePaperpeer-review

3 Scopus citations

Abstract

A ΣΔ modulator fabricated in 0.5μm SOS-CMOS is reported. The design incorporates two 2nd-order loops allowing reconfigurability as either a 2nd-order single loop or a 4th-order 2-2 cascade. Test results of the both modulator configurations over a temperature range of 25°C-200°C are presented. The modulator achieves an effective resolution of 15.5 bits resolution at 25°C and 13.5 bits at 200°C (both at 2KS/s). Design details pertaining to topological selection and device sizing is presented with an emphasis on temperature tolerance. Results of modulator noise analysis is presented along with techniques for improving the modulator noise performance. This paper reports the first 4th-order ΣΔ modulator fabricated in an SOI/SOS process.

Original languageEnglish
Pages75-77
Number of pages3
StatePublished - 2002
EventIEEE International SOI Conference - Williamsburg, VA, United States
Duration: Oct 7 2002Oct 10 2002

Conference

ConferenceIEEE International SOI Conference
Country/TerritoryUnited States
CityWilliamsburg, VA
Period10/7/0210/10/02

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